Lab Report: Benchmarking Trapped-Ion vs Superconducting Devices for Chemistry
Controlled benchmarks comparing trapped-ion and superconducting quantum processors for small molecular simulations — fidelity, connectivity, and workload suitability.
Lab Report: Benchmarking Trapped-Ion vs Superconducting Devices for Chemistry
We benchmarked representative trapped-ion and superconducting quantum processors on small molecular simulation tasks (H2, LiH toy models) to evaluate practical trade-offs. This lab report summarizes methods, metrics, and guidance for simulation workloads.
“Hardware choice depends on algorithm structure — connectivity and coherence time are dominant factors for chemistry circuits.”
Experimental setup
We implemented VQE-style circuits with hardware-aware compilation for each backend. The molecular Hamiltonians were mapped via Jordan-Wigner transformations and tapered to reduce qubit counts. Each run used 1024 shots for hardware measurements and identical classical optimizers (SPSA) with controlled random seeds.
Key findings
- Coherence vs connectivity trade-off: trapped-ion devices had higher single- and two-qubit fidelities and full connectivity; superconducting devices had lower gate times but required SWAPs for nonlocal interactions.
- Compilation overhead: superconducting backends needed more compilation optimizations to reduce SWAP-induced depth; trapped-ion circuits were simpler to map but had longer gate times affecting total wall-clock runtime.
- End-to-end solution quality: for the small molecules tested, trapped-ion hardware produced slightly better energy estimates on average, but superconducting backends completed more iterations per unit of wall-clock time, which mattered for optimizer convergence.
Practical guidance
For chemistry workloads with dense interaction graphs, trapped-ion topologies reduce circuit depth and often yield better fidelity per circuit. If iterative throughput is paramount and mapping can be optimized, superconducting devices can close the gap with aggressive compiler strategies.
Recommendations for researchers
- Benchmark on both hardware types early in project lifecycles.
- Optimize problem mappings to minimize SWAPs for superconducting devices.
- Use adaptive shot allocation to reduce runtime without sacrificing estimator accuracy.
Conclusion
No universal winner emerged; suitability depends on algorithm structure, connectivity requirements, and tolerance for wall-clock runtime. Teams should incorporate hardware-aware compilation and early cross-backend benchmarking into their workflow.
Related Topics
Lab Qubit Collective
Experimental Team
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